Justin Jiang�s Resume
JUSTIN JIANG
3355 Apache Road 5467 Bear Creek Hall, BOULDER, CO 80310 | ------------ |------------ | USA Citizenship
OBJECTIVES AND PROFILE
I am looking for an Intern position in software and hardware development during summer 2019 and beyond. I am proficient in C++/C/Java and have worked with Assembly, Verilog, Matlab, Codasip, and Android Studio. In my college career, I have actively attended engineering seminar conferences, built a 5-stage RISC-V pipeline processor, assembled a proximity-sensor robot, and worked with UI designs and App development in Android Studio to enhance my experience/knowledge academically and professionally.
EDUCATION
University of Colorado Boulder Boulder, CO
Electrical Computer Engineering Major (Major GPA: 3.10) and Computer Science Minor (Minor GPA: 3.57), B.S.– Expected May 2020
TECHNICAL SKILLS
• Proficient in C/C++ and Java Programming
• Assembly Language through ARM Instruction Sets and RISCV
• Analysis skills of invariant systems in time and frequency domains in Laplace and Fourier
• CMOS Transistors and Semiconductor Physics
• Computer architecture in multicore processors and cache coherence
• User Interface and app development with Android Studio
Relevant Coursework
Key Courses:
Microelectronics
o Semiconductor physics and pn junction, MOS transistor operation and circuits, BJT operation and circuits, CMOS logic gates, and Differential Pair, Frequency Response
Data Structures
o Utilized C++ in the following data structures: array-based collections (including dynamic arrays), list-based collections (singly-linked lists), doubly-linked lists, circular-linked lists), stacks, queues, binary search trees, red and black trees, hash tables, graphs
Digital Design Lab
o Hands-on experience in system development and debugging: digital system design and software, hardware building blocks, embedded and mobile computing platforms, assembly/C/Java/Verilog programming languages, mainstream electronic system design platforms(including FPGAs)
Courses with Major Projects:
Computer Organization:
• Experience with computer design in a gate level. Explored instruction set architecture design, control logic, arithmetic and logic unit design, memory design and caches, pipelining, I/0 and peripheral devices.
• Final Project: 5-stage RISC-V pipeline processor (Split instruction / data caches utilizing a professional processor development tool chain in Codasip.)
Digital and Analog Electronics:
• Built projects using capacitors, LEDs, 7 segment, digital logic, frequency, Fourier decomposition, transformers, and rectifiers with the following techniques: Wiring, breadboard technique, soldering, waveform generator, oscilloscope
• Final Project: Digital Tap (Obtains the ideal temperature for a digital tap with a temperature sensor and then modulates temperature of water with a servo)
Digital Logic:
• Implemented concepts of combinational and sequential Boolean algebra, state diagrams, optimizations, and transistors. Became versed in design and applications of digital logic circuits, hardware language Verilog implementation, synthesis of software ideals to (FPGAs)
• Final Project: Reaction timer (Structural State Diagram, used Verilog and FPGAs)
Other courses: HCI Foundations/User-Centered Design & Development, Linear Systems (Signals and Systems), Discrete Math Analysis, Programming Digital Systems, Electronic Design Lab, Renewable Electrical Energy Systems, Multivariable Calculus and Differential Equations, Science Based Technical Writing
WORK EXPERIENCE
Aflac Inc. June 2018 – Sep 2018 Boulder, CO
Benefits Specialist Summer Intern
• Acted as a both team player and self-starter
• Employed social business networking skills in a team-oriented setting
• Tailored employee benefits programs for business owners, CEOS, and HR managers
Casey Middle School Sep. 2017 – Dec 2017 Boulder, CO
STEM Concept Teacher
• Initiated, facilitated, and moderated classroom discussions
• Planned, evaluated, and revised curricula, course content, course materials, and methods of instruction
• Advised students on academic/vocational curricula and career directions
CloudTalk Technology Inc. June 2016 - Aug 2016 Shanghai, China
Web Developer
• Wrote, designed, and edited web page content and directed others to produce content
• Developed databases that support web applications and websites
• Developed and documented style guidelines for website content
Extracurricular
• International Chess, Level 1 in the official Chinese International Chess Ranking System (approximately 1900-2000 on the Elo Ranking System)
• Go, Level (Duan) 2 in the official Chinese Go ranking system
JUSTIN JIANG
3355 Apache Road 5467 Bear Creek Hall, BOULDER, CO 80310 | ------------ |------------ | USA Citizenship
OBJECTIVES AND PROFILE
I am looking for an Intern position in software and hardware development during summer 2019 and beyond. I am proficient in C++/C/Java and have worked with Assembly, Verilog, Matlab, Codasip, and Android Studio. In my college career, I have actively attended engineering seminar conferences, built a 5-stage RISC-V pipeline processor, assembled a proximity-sensor robot, and worked with UI designs and App development in Android Studio to enhance my experience/knowledge academically and professionally.
EDUCATION
University of Colorado Boulder Boulder, CO
Electrical Computer Engineering Major (Major GPA: 3.10) and Computer Science Minor (Minor GPA: 3.57), B.S.– Expected May 2020
TECHNICAL SKILLS
• Proficient in C/C++ and Java Programming
• Assembly Language through ARM Instruction Sets and RISCV
• Analysis skills of invariant systems in time and frequency domains in Laplace and Fourier
• CMOS Transistors and Semiconductor Physics
• Computer architecture in multicore processors and cache coherence
• User Interface and app development with Android Studio
Relevant Coursework
Key Courses:
Microelectronics
o Semiconductor physics and pn junction, MOS transistor operation and circuits, BJT operation and circuits, CMOS logic gates, and Differential Pair, Frequency Response
Data Structures
o Utilized C++ in the following data structures: array-based collections (including dynamic arrays), list-based collections (singly-linked lists), doubly-linked lists, circular-linked lists), stacks, queues, binary search trees, red and black trees, hash tables, graphs
Digital Design Lab
o Hands-on experience in system development and debugging: digital system design and software, hardware building blocks, embedded and mobile computing platforms, assembly/C/Java/Verilog programming languages, mainstream electronic system design platforms(including FPGAs)
Courses with Major Projects:
Computer Organization:
• Experience with computer design in a gate level. Explored instruction set architecture design, control logic, arithmetic and logic unit design, memory design and caches, pipelining, I/0 and peripheral devices.
• Final Project: 5-stage RISC-V pipeline processor (Split instruction / data caches utilizing a professional processor development tool chain in Codasip.)
Digital and Analog Electronics:
• Built projects using capacitors, LEDs, 7 segment, digital logic, frequency, Fourier decomposition, transformers, and rectifiers with the following techniques: Wiring, breadboard technique, soldering, waveform generator, oscilloscope
• Final Project: Digital Tap (Obtains the ideal temperature for a digital tap with a temperature sensor and then modulates temperature of water with a servo)
Digital Logic:
• Implemented concepts of combinational and sequential Boolean algebra, state diagrams, optimizations, and transistors. Became versed in design and applications of digital logic circuits, hardware language Verilog implementation, synthesis of software ideals to (FPGAs)
• Final Project: Reaction timer (Structural State Diagram, used Verilog and FPGAs)
Other courses: HCI Foundations/User-Centered Design & Development, Linear Systems (Signals and Systems), Discrete Math Analysis, Programming Digital Systems, Electronic Design Lab, Renewable Electrical Energy Systems, Multivariable Calculus and Differential Equations, Science Based Technical Writing
WORK EXPERIENCE
Aflac Inc. June 2018 – Sep 2018 Boulder, CO
Benefits Specialist Summer Intern
• Acted as a both team player and self-starter
• Employed social business networking skills in a team-oriented setting
• Tailored employee benefits programs for business owners, CEOS, and HR managers
Casey Middle School Sep. 2017 – Dec 2017 Boulder, CO
STEM Concept Teacher
• Initiated, facilitated, and moderated classroom discussions
• Planned, evaluated, and revised curricula, course content, course materials, and methods of instruction
• Advised students on academic/vocational curricula and career directions
CloudTalk Technology Inc. June 2016 - Aug 2016 Shanghai, China
Web Developer
• Wrote, designed, and edited web page content and directed others to produce content
• Developed databases that support web applications and websites
• Developed and documented style guidelines for website content
Extracurricular
• International Chess, Level 1 in the official Chinese International Chess Ranking System (approximately 1900-2000 on the Elo Ranking System)
• Go, Level (Duan) 2 in the official Chinese Go ranking system