Adam_Kohler_CV
ADAM KOHLER
12206 23rd St. E, Edgewood, WA 98372 | ------------ | ------------
SUMMARY: Motivated Electrical and Computer Engineering Graduate with 3+ years of hardware design and test experience, seeking a position in the electronics industry to optimize and push the boundaries of current technologies. Skilled in analog and digital IC design, validation and verification, and RTL design including simulation and synthesis. Adaptable, resourceful, and able to work effectively in both independent and team-based environments.
EDUCATION
M.S., Electrical and Computer Engineering, GPA 3.31/4.0
Portland State University, Portland OR.
Relevant Courses: Formal Verification of Hardware and Software Systems, Analog Integrated Circuit Design, Digital Integrated Circuit Design I and II, VLSI-Computer-Aided Design, ASIC Design and Synthesis, Low Power Integrated Circuit Design, Digital Design Using Hardware Description Languages, Integrated Circuit Technologies, Applied Optics
B.S., Applied Physics, GPA 3.53/4.0
Pacific Lutheran University, Tacoma WA.
Relevant Courses: Microelectronics, Electrical Circuits, Electromagnetic Theory, Engineering Thermodynamics, Waves and Fluids, Mathematical Physics I and II, Multivariable Calculus, Differential Equations, Linear Algebra
TECHNICAL SKILLS
Design Tools: Proficient with LTSpice, MATLAB, Cadence Virtuoso, Synopsys Design Compiler, EagleCAD, Visual Studio
Hardware Descriptive Languages: Skilled in SystemVerilog, Verilog; Some experience with VHDL
Programming Languages: Skilled in Python, Java; Some experience with C
Lab Equipment: Oscilloscope, Function Generator, Digital Multimeter, Spectrum Analyzer, Power Supply, Soldering Iron
Microsoft Office: Word, Excel, PowerPoint
Operating Systems: Windows, Linux
TECHNICAL PROJECTS
Developed cryptographic algorithm for FPGA using Verilog: The SHA256 design included software pre-processing, and modules for message scheduling and compression. Hardware modules were verified and integrated into an embedded system design, which was synthesized and implemented on to the FPGA.
Developed algorithm program in Python: A Kernighan-Lin algorithm partitioned a graph such that the connections between sets was minimal. The program was used to optimize digital circuit layouts in VLSI.
Wrote document on verification techniques for use in course: The document consisted of concurrent testbench techniques that would compliment the hardware design techniques used in the course. This project was extracurricular.
Designed digital circuits using SystemVerilog and Design Compiler: Finite state machines, FIFO buffers, priority encoders, decoders, and more were tested and verified. Designs were synthesized and optimized for dynamic power, cell area, and number of gates.
Simulated digital circuits using Cadence Virtuoso: Various implementations of a full adder were designed and tested for rise and fall times, and propagation delay. Designed data path with 16-bit ALU, D flip-flops, 6 input multiplexers, and look ahead carry generator. Physical layouts were created using place-and-route tools.
Simulated and built PLL using LTSpice and EagleCAD: A phase-locked loop commonly used in telecommunications was created using a phase detector, filter system, and voltage controlled oscillator. The system was constructed on a PCB and verified.
Designed and built filtered audio amplifier: The circuit consisted of low pass, high pass, and band pass filters designed to activate LEDs at specific frequencies. A custom PCB was created using a prototyping machine, a photoresist was applied, and components were soldered by hand.
Designed and built power converters: Projects include multiple power inverters, DC to AC transformer designed to wirelessly illuminate fluorescent bulbs, boost converters, and buck regulator for USB charging purposes. Each project was built and verified.
ACTIVITIES
Society of University Physicists Vice-President (Undergrad)
Portland State Aerospace Society Member
ADAM KOHLER
12206 23rd St. E, Edgewood, WA 98372 | ------------ | ------------
SUMMARY: Motivated Electrical and Computer Engineering Graduate with 3+ years of hardware design and test experience, seeking a position in the electronics industry to optimize and push the boundaries of current technologies. Skilled in analog and digital IC design, validation and verification, and RTL design including simulation and synthesis. Adaptable, resourceful, and able to work effectively in both independent and team-based environments.
EDUCATION
M.S., Electrical and Computer Engineering, GPA 3.31/4.0
Portland State University, Portland OR.
Relevant Courses: Formal Verification of Hardware and Software Systems, Analog Integrated Circuit Design, Digital Integrated Circuit Design I and II, VLSI-Computer-Aided Design, ASIC Design and Synthesis, Low Power Integrated Circuit Design, Digital Design Using Hardware Description Languages, Integrated Circuit Technologies, Applied Optics
B.S., Applied Physics, GPA 3.53/4.0
Pacific Lutheran University, Tacoma WA.
Relevant Courses: Microelectronics, Electrical Circuits, Electromagnetic Theory, Engineering Thermodynamics, Waves and Fluids, Mathematical Physics I and II, Multivariable Calculus, Differential Equations, Linear Algebra
TECHNICAL SKILLS
Design Tools: Proficient with LTSpice, MATLAB, Cadence Virtuoso, Synopsys Design Compiler, EagleCAD, Visual Studio
Hardware Descriptive Languages: Skilled in SystemVerilog, Verilog; Some experience with VHDL
Programming Languages: Skilled in Python, Java; Some experience with C
Lab Equipment: Oscilloscope, Function Generator, Digital Multimeter, Spectrum Analyzer, Power Supply, Soldering Iron
Microsoft Office: Word, Excel, PowerPoint
Operating Systems: Windows, Linux
TECHNICAL PROJECTS
Developed cryptographic algorithm for FPGA using Verilog: The SHA256 design included software pre-processing, and modules for message scheduling and compression. Hardware modules were verified and integrated into an embedded system design, which was synthesized and implemented on to the FPGA.
Developed algorithm program in Python: A Kernighan-Lin algorithm partitioned a graph such that the connections between sets was minimal. The program was used to optimize digital circuit layouts in VLSI.
Wrote document on verification techniques for use in course: The document consisted of concurrent testbench techniques that would compliment the hardware design techniques used in the course. This project was extracurricular.
Designed digital circuits using SystemVerilog and Design Compiler: Finite state machines, FIFO buffers, priority encoders, decoders, and more were tested and verified. Designs were synthesized and optimized for dynamic power, cell area, and number of gates.
Simulated digital circuits using Cadence Virtuoso: Various implementations of a full adder were designed and tested for rise and fall times, and propagation delay. Designed data path with 16-bit ALU, D flip-flops, 6 input multiplexers, and look ahead carry generator. Physical layouts were created using place-and-route tools.
Simulated and built PLL using LTSpice and EagleCAD: A phase-locked loop commonly used in telecommunications was created using a phase detector, filter system, and voltage controlled oscillator. The system was constructed on a PCB and verified.
Designed and built filtered audio amplifier: The circuit consisted of low pass, high pass, and band pass filters designed to activate LEDs at specific frequencies. A custom PCB was created using a prototyping machine, a photoresist was applied, and components were soldered by hand.
Designed and built power converters: Projects include multiple power inverters, DC to AC transformer designed to wirelessly illuminate fluorescent bulbs, boost converters, and buck regulator for USB charging purposes. Each project was built and verified.
ACTIVITIES
Society of University Physicists Vice-President (Undergrad)
Portland State Aerospace Society Member